Which Register Is Used For Returning Result Values
6.4 Functions Returning Values
Functions that render an integer value return it in %o0 or %o0 and %o1. For 32-chip code, long long information are returned with the upper 32-bits in %o0 and the lower 32-bits in %o1, treating %o0 and %o1 as if they were 32-flake registers.
If the function returning a value has executed a save teaching, then the return value would ordinarily be put into %i0 or %i1 just earlier executing a restore or render instruction, which changes register windows and puts the values into %o0 and %o1.
Functions that return a floating-indicate or complex value return it in some subset of %f0, %f1, %d0, %d2, %d4, and %d6. So a float value is returned in %f0, and a double value is returned in %d0 (or equivalently in %f0 and %f1).
Structure and assortment values returned by value are more complicated and beyond the scope of this transmission. Registers %o0-%o5 and %f0-%f31 may exist used as temporaries.
6.iv.1 Limitations for 32–Flake Code
The global registers and the output registers can exist used to concord 64-bit integer values, but the input registers and the local registers can only be used to concur 32-bit values in the lower half of the register. This is because the annals save expanse for the input and local registers does not take enough room to store the full 64-bits and only the lower 32-bits are saved. The input and local registers may be saved and afterward reloaded at whatsoever point in time by a trap to handle an interrupt.
half dozen.4.2 Limitations for Both 32–Chip and 64–Bit Code
There is a minimum stack size for any routine, and certain areas of the stack that cannot exist used.
The minimum stack frame size is just large enough to hold the register save expanse plus the required 6 slots for parameter passing. For 32-fleck lawmaking, the minimum stack frame size is 92 bytes. This is normally allocated with a "save %sp, 92, %sp" instruction. For 64-bit code, the minimum stack frame size is 176 bytes. This is normally allocated with a "save %sp, 176, %sp" educational activity.
The stack area below where %sp points is volatile and might exist overwritten at any betoken in fourth dimension (for example. by an interrupt). Practise non store whatsoever useful data in that location, instead, change the %sp downward outset and store higher up the %sp.
half-dozen.4.iii Additional Data
For more than information virtually the SPARC awarding binary interface (ABI), see the following documents available at sparc.org:
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SPARC Compliance Definition 2.3 (32–fleck specification)
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SPARC Compliance Definition 2.4 (64–chip specification)
Refer too to the SPARC V9 Architecture Manual (PDF) descriptions of the instruction set, registers, and other details.
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Source: https://docs.oracle.com/cd/E26502_01/html/E28387/gentextid-2775.html
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